As is known in the art, transistors such as metal oxide semiconductor (MOS) transistors, have been formed in isolated regions of a semiconductor body such as an epitaxial layer, which was itself formed on a semiconductor, typically a bulk silicon substrate. With an n-channel MOS field effect transistor (FET), the body is of p-type conductivity and the source/drain regions are formed in the p-type conductivity body as N+ type conductivity regions. With p-channel MOSFET, the body or epitaxial layer, is of n-type conductivity and the source and drain regions are formed in the n-type conductivity body as P+ type conductivity regions. It has been suggested that the semiconductor body, or layer, be formed on an insulating substrate, or over an insulation layer formed in a semiconductor substrate. Such technology is sometimes referred to as silicon-on-insulator (SOI) technology. The SOI MOS technologies have a number of advantages over bulk silicon MOS transistors. These advantages include: reduced source/drain capacitance and hence improved speed performance at higher-operating frequencies; reduced N+ to P+ spacing and hence, higher packing density due to ease of isolation; and higher “soft error” upset immunity (i.e., the immunity to the effects of alpha particle strikes).
Silicon-on-insulator technology is characterized by the formation of a thin silicon layer for formation of the active devices over an insulating layer, such as an oxide, which is in turn formed over a substrate. Transistor sources and drains are formed by, for example, implantation into the silicon layer while transistor gates are formed by a patterned conductor (i.e., polysilicon). Such structure is provided significant gain in performance by having lower parasitic capacitance (due to the insulator layer) and increased drain current due to floating body charging effects (since no connection is made to the channel region and charging of the floating body provides access towards the majority of carriers which dynamically lower the threshold voltage, at resulting in increased drain current). However, the floating body can introduce dynamic instabilities in the operation of such a transistor.
Floating-body transistors predicated on thin SOI films exhibit good performance. The body resistance of conventional SOI body-tied transistors is quite high, leading to the degradation of body-tied transistor performance. It's preferable to provide thick SOI films for use with body-tied transistors in order to lower the body resistance of the body-tied transistors.